Advantech SKY-MXM-3500A handleiding
Handleiding
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11 SKY-MXM-3500A User Manual
Chapter 2 System Requirements
2.6 HDMI on DP Interface
Native DVI or HDMI connector support can be implemented using a display port
interface. Additional circuitry is required on the system and the proper signal mapping
must be observed. As Figure 2.5 shows, 499 W 1% pull-down resistors to ground on
the DP lane signals must be placed on the connector side of the AC coupling capaci-
tors gated by a FET to limit the leakage. Additionally level shifting circuits must also
be implemented on DDC Data and Clock, refer to the MXM Version 3.0 System
Design Guide for specific details.
Table 2.2 shows the mapping to connect the signals from the MXM connector to the
HDMI/DVI connector. For the optional dual-link DVI support refer to Table 2.3.
Figure 2.5 Dual-mode DisplayPort Implementation
2.6.1 HDMI Interface
The High-Definition Multimedia Interface (HDMI) supports the Transition Minimized
Differential Signaling (TMDS) and Fixed Rate Link (FRL) and can provide up to 48
Gbps. The HDMI Connector uses the DDC interface for monitor identification and
capabilities. The recommended pull-up resistor is a 2 kΩ (1% precision) to the
DDC_5V power rail. Near the GPU, the I2C lines are pulled up via a 10 kΩ. DDC fil-
ters are recommended and may be tuned during the validation phase for each PCB
design to meet the display validation criteria and/or EMI compliance. The DDC output
requires a level shifter circuit because the IFPx_AUX lines are not 3.3 V tolerant.
Table 2.3: DisplayPort Multiplexed Signal Definition
Pin Name DVI/HDMI
DP_x_L0
DP_x_L0#
TX_x_D2
TX_x_D2#
DP_x_L1
DP_x_L1#
TX_x_D1
TX_x_D1#
DP_x_L2
DP_x_L2#
TX_x_D0
TX_x_D0#
DP_x_L3
DP_x_L3#
TX_x_CLK
TX_x_CLK#
DP_x_AUX DDC_x_CLK
DP_x_AUX# DDC_x_DAT
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Productinformatie
| Merk | Advantech |
| Model | SKY-MXM-3500A |
| Categorie | Niet gecategoriseerd |
| Taal | Nederlands |
| Grootte | 2059 MB |
