Advantech PCI-1780U handleiding
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PCI-1780U User Manual 10
2.3.3 Counter Input Signal Connection (TTL, Pull-Up)
The voltage logic level between the counter input terminals (counter clock, counter
gate, counter arm, and sample clock) and the ground (GND) terminal is measured.
To prevent indeterminate or fluctuating results when the input is floating, the counter
input signals are internally pulled up. This is shown in Figure 2.6.
Figure 2.4 Counter input signal connection
The input voltage must be either higher than the minimum ON-state value or lower
than the maximum OFF-state value for a deterministic result. If the input voltage falls
between these two values, the result is indeterminate and may be either ON or OFF.
Additionally, do not apply a voltage higher than the maximum allowable ON-state
value or lower than the minimum allowable OFF-state value, as this may damage the
device. Refer to the device specifications for ON and OFF-state voltage ranges.
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Productinformatie
| Merk | Advantech |
| Model | PCI-1780U |
| Categorie | Niet gecategoriseerd |
| Taal | Nederlands |
| Grootte | 4254 MB |
