Supermicro H14DSG-OD handleiding
Handleiding
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PCI AER Support
This setting controls the Advanced Error Reporting (AER) capability for PCIe devices in the
system. The options are Enabled and Disabled.
NUMA Nodes Per Socket
Use this setting to specify the number of desired NUMA (Non-Uniform Memory Access) nodes
per socket. Zero will attempt to interleave the two sockets together. The options are NPS0,
NPS1, NPS2, NPS4, and Auto.
ACPI SRAT L3 Cache As NUMA Domain
This setting determines how the system's NUMA (Non-Uniform Memory Access) domains are
defined in relation to the L3 cache. The options are Disabled, Enabled, and Auto.
Super IO Configuration Menu
►Super IO Configuration
Note: This submenu is available when your system supports this feature.
The following information is displayed.
l
Super IO Chip
Serial Port 1 Configuration Menu
►Serial Port 1 Configuration
Serial Port 1
Select Enabled to enable serial port 1. The options are Disabled and Enabled.
Device Settings (Available when "Serial Port 1" above is set to Enabled)
This feature displays the base I/O port address and the Interrupt Request address of serial port
1.
Change Settings (Available when "Serial Port 1" above is set to Enabled)
Use this feature to specify the base I/O port address and the Interrupt Request address of serial
port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to serial
port 1. The options are Auto, (IO=3F8h; IRQ=4;), (IO=3F8h; IRQ=3,4,5,6,7,9,10,11,12;),
(IO=2F8h; IRQ=3,4,5,6,7,9,10,11,12;), (IO=3E8h; IRQ=3,4,5,6,7,9,10,11,12;), and (IO=2E8h;
IRQ=3,4,5,6,7,9,10,11,12;).
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H14DSG-OD: UEFI BIOS
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Productinformatie
| Merk | Supermicro |
| Model | H14DSG-OD |
| Categorie | Niet gecategoriseerd |
| Taal | Nederlands |
| Grootte | 16495 MB |







