Microchip MPF200TL handleiding
Handleiding
Je bekijkt pagina 44 van 102
AC Switching Characteriscs
Data Sheet
© 2024 Microchip Technology Inc. and its subsidiaries
DS00003831E - 44
...........continued
Parameter Global Clock Period Jitter Unit
Max period jitter
(absolute)
See Note 5 29 54 168 227 ps
Max period jitter
(peak to peak)
See Note 5 ±14.5 ±27 ±84 ±113.5 ps
1. % Flip-Flop (FF) used is dened as the percentage of total device FFs that are switching in the
largest clock domain within the FPGA (including synchronous and divided clocks).
2. The 50% and 75% FF used per clock domain are only shown to illustrate the impact of high
utilization on a global clock net jitter. Typical designs are expected to have less than 25% FF used
per clock domain (as dened in the preceeding note).
3. Measured jitter is generated at varying % FF used levels with a switching rate of 30%.
4. Eective FF toggle % is the product of % FF used and average toggle rate. In Table 5-22, jitter is
specied for an average toggle rate of 30%. To determine jitter for a given combination, multiply
FF used and average toggle rate then use the linear interpolation equation as shown in Figure
5-4.
5. Use PLL, DLL, 160 MHz RC Osc jitter specications, or input jitter specications, as applicable.
6. Refer to Table 5-23 for formulas to calculate period jitter as a function of the clocking topology.
7. For further details, see the PolarFire Family Clocking Resources Users Guide (section Global Net
Clock Jitter).
Bekijk gratis de handleiding van Microchip MPF200TL, stel vragen en lees de antwoorden op veelvoorkomende problemen, of gebruik onze assistent om sneller informatie in de handleiding te vinden of uitleg te krijgen over specifieke functies.
Productinformatie
| Merk | Microchip |
| Model | MPF200TL |
| Categorie | Niet gecategoriseerd |
| Taal | Nederlands |
| Grootte | 18409 MB |
