Asus PE1000S handleiding
Handleiding
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64
PE Series
4.1 Watchdog Timer implementation
The Watchdog Timer used in this Embedded Computer is the POST
Watchdog Timer. The Watchdog Timer circuit is in SuperIO and can be
controlled by the BIOS setup menu through the system BIOS for different
boot phases.
Please refer to the table below for more details on the implementation of
the Watchdog Timer.
Watchdog timer Implementation Default Timeout
POST Watchdog Timer
This Watchdog Timer is for recovering
the system from crashes during BIOS
takeover to OS.
NOTE: T
he default setting for the
BIOS item is set to enabled.
The timeout value is
determined by the
BIOS settings.
*OS Watchdog Timer
No implementation. User needs to
write software in OS to keep updating
the watchdog timer to prevent it from
timing out. The application is executed
on payload.
NOTE: Please
refer to the section
Watchdog Timer Programming
for more information.
N/A
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Productinformatie
| Merk | Asus |
| Model | PE1000S |
| Categorie | Niet gecategoriseerd |
| Taal | Nederlands |
| Grootte | 4672 MB |
