Advantech SKY-MXM-A4500 handleiding
Handleiding
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SKY-MXM-A4500 User Manual 8
2.1 Power Sequencing
There is no power sequencing requirement for the input voltages to the MXM mod-
ule. However the PWR_EN signal may be asserted only after all power rails are
within the specified tolerance. The state of PWR_GOOD is undefined until all rails
are fully ramped. Refer to Figure 2.1 for details.
Figure 2.1 Power Sequencing
2.2 Input Voltage Requirements
Input voltage to the GPU must strictly follow the ranges listed in the below table (with
reference to GND).
Operating outside the required voltage range will cause permanent damage to the
GPU.
Table 2.1: Signals Exempted
Group Signals
Power and Thermal SMB_CLK, SMB_DAT, TH_OVER#, TH_ALERT#, PWR_GOOD
System Management WAKE#, PEX_CLK_REQ#
Display DP_x_HPD, LVDS_x_HPD
Note! No voltage shall be applied to any MXM module signal pin (except
power pins and open drain signals specified in Table 2.1 until PWR_-
GOOD is asserted.
Power Rail Min. Typ. Max.
PWR_SRC 6.5V 7-20V 22V
5V 4.7V 5V 5.3V
3V3 3.1V 3.3V 3.5V
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Productinformatie
| Merk | Advantech |
| Model | SKY-MXM-A4500 |
| Categorie | Niet gecategoriseerd |
| Taal | Nederlands |
| Grootte | 1939 MB |
