Advantech PCIE-1810 handleiding
Handleiding
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ix PCIE-1810 User Manual
Figure 3.29Synchronize multiple devices by MDSI cables ......... 36
Table 3.1: Software configuration for synchronization using MDSI
cable ......................................................................... 36
3.8 Calibration ............................................................................................... 36
Figure 3.30Calibration utility ....................................................... 37
Appendix A Specification ......................................39
A.1 Function Block Diagram .......................................................................... 40
Figure A.1 Function Block .......................................................... 40
A.2 Analog Input ............................................................................................ 40
Table A.1: -3 dB Bandwidth ....................................................... 40
Table A.2: Accuracy................................................................... 41
Table A.3: Accuracy................................................................... 41
Table A.4: Idle Channel Noise ................................................... 41
Table A.5: Signal-to-Noise Ratio (SNR, 1 kHz Input Tone, -1 dBFS
Amplitude) ................................................................ 42
Table A.6: Total Harmonic Distortion (THD, 1 kHz Input Tone, -1
dBFS Amplitude) ...................................................... 42
Table A.7: Total Harmonic Distortion Plus Noise (THD+N, 1 kHz
Input Tone, -1 dBFS Amplitude) ............................... 42
Table A.8: Spurious-Free Dynamic Range (SFDR, 1 kHz Input
Tone, -1 dBFS Amplitude) ........................................ 42
Table A.9: Effective Number of Bits (ENOB, 1 kHz Input Tone, -1
dBFS Amplitude) ...................................................... 43
Table A.10:Signal to Noise and Distortion (SINAD, 1 kHz Input
Tone, -1 dBFS Amplitude) ........................................ 43
A.3 Analog Output ......................................................................................... 44
A.4 Bi-directional Digital Input/Output............................................................ 45
A.4.1 Digital Input ................................................................................. 45
A.4.2 Digital Output .............................................................................. 45
A.5 Trigger..................................................................................................... 46
A.6 External Clock Input ................................................................................ 46
A.7 Multi-Device Synchronization Interface (MDSI) ...................................... 46
A.8 Counter ................................................................................................... 47
A.9 FPGA Code Update ................................................................................ 48
A.10 General Specifications ............................................................................ 48
A.10.1 Power Requirements .................................................................. 48
A.10.2 Power Supply Output .................................................................. 48
A.10.3 Physical....................................................................................... 48
A.10.4 Environmental ............................................................................. 48
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Productinformatie
| Merk | Advantech |
| Model | PCIE-1810 |
| Categorie | Niet gecategoriseerd |
| Taal | Nederlands |
| Grootte | 4970 MB |
