Advantech IDK-1108R-50SVB1 handleiding
Handleiding
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IDK-1108R-50SVB1 User Manual 16
2.5.2 Block Diagram
2.6 AC Timing Characteristics
2.6.1 AC Timing Characteristic of LVDS
Table 2.11: AC Timing Characteristics of LVDS
Switching Characteristics
Vcc=3.0-3.6V, Ta=-10-+70°C
RECEIVER
t
RCP
CLK OUT Period 11.76 T 50.0 ns
t
RCH
CLK OUT High Time
4T/7 ns
t
RCL
CLK OUT Low Time
3T/7 ns
t
RCD
RCLK+/- to CLK OUT Delay 5T/7 ns
t
RS
TTL Data Setup to CLK OUT
3T/7-2.5
ns
t
RH
TTL Data Hold from CLK OUT
4T/7-3.5
ns
t
TLH
TTL Low to High Transition Time
3.0 5.0 ns
t
THL
TTL High to Low Transition Time
3.0 5.0 ns
t
RIP1
Input Data Position 0(T=11.76ns) -0.4
0.0 0.4 ns
t
IPO
Input Data Position 1(T=11.76ns)
T/7-0.4 T/7 T/7+0.4 ns
t
RIP6
Input Data Position 2(T=11.76ns)
2T/7-0.4 2T/7 2T/7+0.4 ns
t
RIP5
Input Data Position 3(T=11.76ns)
3T/7-0.4 3T/7 3T/7+0.4 ns
t
RIP4
Input Data Position 4 (T=11.76ns)
4T/7-0.4 4T/7 4T/7+0.4 ns
t
RIP3
Input Data Position 5(T=11.76ns)
5T/7-0.4 5T/7 5T/7+0.4 ns
t
RIP2
Input Data Position 6(T=11.76ns)
6T/7-0.4 6T/7 6T/7+0.4 ns
t
RPLL
Phase Lock Loop Set
10.0 ms
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Productinformatie
| Merk | Advantech |
| Model | IDK-1108R-50SVB1 |
| Categorie | Niet gecategoriseerd |
| Taal | Nederlands |
| Grootte | 6434 MB |
Caratteristiche Prodotto
| Gewicht | 250 g |
| Breedte | 203 mm |
| Diepte | 8 mm |
| Hoogte | 145.5 mm |
| Beeldschermdiagonaal | 8.4 " |
